1. Field
This disclosure relates generally to semiconductor devices, and more specifically, to dynamically reducing DC offset in semiconductor devices.
2. Related Art
Advanced semiconductor devices are being developed that require a supply voltage with 100 milliVolts (mV) or less variation or tolerance. Considering that several tens of milliVolts are eroded by current-resistance (IR) drop within the device and test equipment limitations for calibrating circuitry to provide reference voltages, band gap circuits and other low voltage detectors (LVD), the regulator may not have any operational margin. Yet, it is desirable to provide an LVD with small variation over corner voltages and a wide range of temperatures to allow a microprocessor core to run at tighter voltage with advantages of improved speed, reduced power consumption and leakage, and to increase the reliability of operation. In order to achieve precise LVDs, a precise voltage reference is required. Therefore a band gap circuit that generates the reference voltage may be calibrated or trimmed to achieve a small variation, however the trimming code can only be read as the system is starting and several complications arise.
Conventional band gap reference circuits are composed of a delta base-emitter voltage (Vbe) cell, an amplifier, and a start-up section. Error introduced by the amplifier is equal to its input (referred offset voltage (Vos)) multiplied by a band gap loop gain, which is a gain factor that usually ranges between 10 and 20. An input referred offset voltage of 1 milliVolts (mV) can result in an error up to 20 mV.